KOLLMORGEN PRD-B040SSIB-63控制卡,PRD-B040SSIB-63使用方法教程
通過(guò)將PLC1中同步程序中的邏輯長(cháng)度增加到
PLC不同步，可測量最大邏輯量
該同步程序可用的解決方案時(shí)間。示例的測量值
系統如下表所示。通過(guò)增加PRD-B040SSIB-63控制
20ms邏輯的邏輯解算時(shí)間，直到程序變?yōu)?/p>
已同步。將20ms程序保持在該設置，另一個(gè)測量是
40ms同步程序采用相同的方式。此方法持續到
其余掃描集。下表將20ms同步程序分解為微循環(huán)。
FIP總線(xiàn)控制器第4章對這些部件進(jìn)行了說(shuō)明
用戶(hù)手冊。
當數據從FIP網(wǎng)絡(luò )通過(guò)
FBC，并繼續執行PLC應用程序。隨著(zhù)
數據離開(kāi)PLC應用程序，通過(guò)FBC，并返回到FIP
網(wǎng)絡(luò )示例2
KOLLMORGEN PRD-B040SSIB-63控制卡
在此示例中，將11個(gè)遠程輸入/輸出機架添加到中所述的兩個(gè)PLC網(wǎng)絡(luò )
示例1。每個(gè)遠程輸入/輸出機架具有相同的19個(gè)輸入/輸出模塊；ALG222
（5） ，ALG392（6），MDL753（3），MDL655（5）。此配置在以下位置使用兩個(gè)同步程序：
100ms和300ms的周期。
By increasing the length of the logic in a sync program in PLC1 to the point where the
PLC becomes out of sync, a measurement can be made of the maximum amount of logic
solution time available for that sync program. The measurements for the example
system are shown in the following table. The measurements were taken by increasing
the logic solution time of the 20ms logic to a point just before the program becomes
synchronized. Leaving the 20ms program at that setting, another measurement was
taken in the same fashion for the 40ms sync program. This method continued through
the remaining scan sets.The table below breaks down the 20ms sync program into the different components of
the microcycle. These components are explained in Chapter 4 of the FIP Bus Controller
User’s Manual.
The breakdown measures the data as it travels from the FIP network, passes through the
FBC, and continues to the PLC application program. The breakdown continues as the
data leaves the PLC application program, passes through the FBC, and returns to the FIP
network.Example 2
In this example, 11 remote I/O racks are added to the two-PLC network described in
example 1. Each remote I/O rack has an identical assortment of 19 I/O modules; ALG222
(5), ALG392 (6), MDL753 (3), MDL655 (5). This configuration uses two sync programs at
periods of 100ms and 300ms.
