EMERSON VE3055M1功率控制器
定時(shí)器4電流計數寄存器（TMRCCR4）定時(shí)器4的電流計數可通過(guò)定時(shí)器4電流計數器寄存器（TMRC-CR4）讀取，該寄存器位于BAR2中地址的偏移量0x28處。此寄存器中的位映射如下：讀取此字段時(shí)，鎖存并返回當前計數值。根據WDT控制狀態(tài)寄存器（CSR2）中“讀取鎖存選擇”位的設置，有兩種模式?jīng)Q定如何鎖存計數。有關(guān)這兩種模式的更多信息，請參閱CSR2寄存器說(shuō)明。定時(shí)器1 IRQ清除（T1IC）定時(shí)器1 IRQ-清除（T1IC）寄存器用于清除定時(shí)器1引起的中斷。寫(xiě)入此寄存器（位于BAR2中地址的偏移量0x30處），將清除計時(shí)器1的中斷。這也可以通過(guò)將“0”寫(xiě)入定時(shí)器控制狀態(tài)寄存器（CSR1）的相應“定時(shí)器x引起的IRQ”字段來(lái)完成。該寄存器是只讀的，寫(xiě)入的數據是無(wú)關(guān)的。
Timer 4 Current Count Register (TMRCCR4)
The current count of Timer 4 may be read via the Timer 4 Current Count Register
(TMRCCR4), located at offset 0x28 from the address in BAR2. The mapping of bits in
this register are as follows:
When this field is read, the current count value is latched and returned. There are
two modes that determine how the count is latched depending on the setting of the
“Read Latch Select” bit in the WDT Control Status Register (CSR2). See the CSR2
register description for more information on these two modes.
Timer 1 IRQ Clear (T1IC)
The Timer 1 IRQ Clear (T1IC) register is used to clear an interrupt caused by Timer 1.
Writing to this register, located at offset 0x30 from the address in BAR2, causes the
interrupt from Timer 1 to be cleared. This can also be done by writing a “0” to the
appropriate “Timer x Caused IRQ” field of the timer Control Status Register (CSR1).
This register is write only and the data written is irrelevant.
