REXROTH MSK061C-0600-NN-M1-BG0-NNNN伺服電機
1.產(chǎn) 品 介 紹
品牌：REXROTH
型號說(shuō)明：REXROTH MSK061C-0600-NN-M1-BG0-NNNN伺服電機
優(yōu)勢：供應進(jìn)口原裝正品，專(zhuān)業(yè)停產(chǎn)配件。
公司主營(yíng)特點(diǎn)：主營(yíng)產(chǎn)品各種模塊/卡件，控制器，觸摸屏，伺服驅動(dòng)器。
2.產(chǎn) 品 詳 情 資 料：
REXROTH MSK061C-0600-NN-M1-BG0-NNNNI/O總線(xiàn)通過(guò)I/O總線(xiàn)建立I/O級與中央設備的數據連接。由于I/O總線(xiàn)是冗余的，每個(gè)中央設備都有自己的I/O總線(xiàn)，因此也有獨立的I/O子機架。第一條I/O總線(xiàn)與中央模塊1相關(guān)聯(lián)，第二條I/O總線(xiàn)則與中央模塊2相關(guān)聯(lián)。I/O總線(xiàn)耦合模塊已集成在中央機架中。對于I/O子架，通過(guò)安裝在插槽17中的耦合模塊REXROTH MSK061C-0600-NN-M1-BG0-NNNN連接到I/O總線(xiàn)。各個(gè)子架之間的總線(xiàn)連接通過(guò)BV 7032數據電纜在后側建立。為了終止I/O總線(xiàn)，在開(kāi)頭和結尾插入一個(gè)REXROTH MSK061C-0600-NN-M1-BG0-NNNN模塊。下一頁(yè)顯示了I/O總線(xiàn)的結構原理。中央模塊REXROTH MSK061C-0600-NN-M1-BG0-NNNN具有PES H51q MS TüV認證的安全相關(guān)應用的中央模塊包含中央模塊結構中演示的基本功能：這些基本功能包括兩個(gè)時(shí)鐘同步的微處理器，每個(gè)微處理器都有自己的內存，一個(gè)處理器處理真實(shí)數據和程序，另一個(gè)處理反轉數據和程序
The I/O Bus The data connection of the I/O level with the central device is established via the I/O bus. Because the I/O bus is redundant each central device has its own I/O bus and thus also separated own I/O subracks. The 1st I/O bus is associated to central module 1 and the 2nd I/O bus associated to central module 2. The I/O bus coupling modules are already integrated in the central rack. With the I/O subrack the connection to the I/O bus is via a coupling moduleREXROTH MSK061C-0600-NN-M1-BG0-NNNN installed in slot 17. The connection of the bus between the individual subracks is established at the rear side via the BV 7032 data cable. To terminate the I/O bus, an REXROTH MSK061C-0600-NN-M1-BG0-NNNN module is plugged in at the beginning and the end. The construction principle of the I/O bus is shown on the following page.Central Module REXROTH MSK061C-0600-NN-M1-BG0-NNNNThe central module for safety related applications with TüV certificate of the PES H51q-MS contains the essential functions demonstrated in the structure of the central module:These essential functions are – two clock-synchronised micro processors – each mikroprocessor with an own memory, one processor operates with real data and program and the other one with inverted data and program
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