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490NRP25400可編程模塊

作者:xqt 發(fā)布時(shí)間:2022-07-06 09:59:20 次瀏覽

490NRP25400可編程模塊,SCHNEIDER使用范圍GCSR允許VMEbus主機重置本地總線(xiàn)。此功能非常危險,應與一起使用小心本地重置功能是部分系統重置,而不是完整的系統重置,如通電重置或系統重置*。當本地總線(xiàn)重置信號被斷言時(shí),一個(gè)本地總線(xiàn)循環(huán)可能中止。VMEchip2已連接本地總線(xiàn)和VMEbus,如果中斷VMEbus的周期是有界的,可能會(huì )導致不穩定的操作。490NRP25400可編程模塊

490NRP25400可編程模塊,SCHNEIDER使用范圍

GCSR允許VMEbus主機重置本地總線(xiàn)。此功能非常危險,應與一起使用小心本地重置功能是部分系統重置,而不是完整的系統重置,如通電重置或系統重置*。當本地總線(xiàn)重置信號被斷言時(shí),一個(gè)本地總線(xiàn)循環(huán)可能中止。VMEchip2已連接本地總線(xiàn)和VMEbus,如果中斷VMEbus的周期是有界的,可能會(huì )導致不穩定的操作。

490NRP25400 -2.jpg

490NRP25400 -1.jpg

490NRP25400可編程模塊本地處理器和VMEbus主機應使用中斷或郵箱位置;在正常通信中不應使用重置。重置僅當本地處理器停止或本地總線(xiàn)被掛起,重置是最后的手段。當MVME162處于重置狀態(tài)時(shí),忽略對其的任何VMEbus訪(fǎng)問(wèn)。如果啟用全局總線(xiàn)計時(shí)器,生成總線(xiàn)錯誤。介紹本章介紹了塊上的MVME162嵌入式控制器圖表級別。功能描述概述了MVME162,然后詳細描述了MVME162的幾個(gè)塊電路。圖4-1顯示了MVME162主模塊的框圖。圖4-2顯示了奇偶校驗DRAM夾層模塊的框圖。其他MVME162塊的說(shuō)明,包括嵌入式MVME162中給出了ASIC和外圍芯片控制器程序員參考指南。有關(guān)功能的其余部分,請參閱它MVME162的說(shuō)明。MVME162功能描述MVME162是一種高功能VMEbus單板計算機圍繞MC68040/MC68LC040芯片設計。它有1MB、4MB或8MB的DRAM、512KB的SRAM、1MB閃存、四個(gè)MVIP工業(yè)包接口和兩個(gè)串行端口(一個(gè)EIA-232-D DCE;一個(gè)EIA-232-D或EIA530 DCE/DTE)。選項包括SCSI大容量存儲接口、LAN以太網(wǎng)收發(fā)器接口和非VMEbus版本。

The GCSR allows a VMEbus master to reset the local bus.

This feature is very dangerous and should be used with

caution. The local reset feature is a partial system reset, not

a complete system reset such as powerup reset or

SYSRESET*. When the local bus reset signal is asserted, a

local bus cycle may be aborted. The VMEchip2 is connected

to both the local bus and the VMEbus and if the aborted

cycle is bound for the VMEbus, erratic operation may result.

Communications between the local processor and a

VMEbus master should use interrupts or mailbox locations;

reset should not be used in normal communications. Reset

should be used only when the local processor is halted or

the local bus is hung and reset is the last resort.

Any VMEbus access to the MVME162 while it is in the reset state is ignored. If

a global bus timer is enabled, a bus error is generated.Introduction

This chapter describes the MVME162 Embedded Controller on a block

diagram level. The Functional Description provides an overview of the

MVME162, followed by a detailed description of several blocks of MVME162

circuitry. Figure 4-1 shows a block diagram of the MVME162 main module.

Figure 4-2 shows a block diagram of the parity DRAM mezzanine module.

Descriptions of other MVME162 blocks, including programmable registers in

the ASICs and peripheral chips, are given in the MVME162 Embedded

Controller Programmer’s Reference Guide. Refer to it for the rest of the functional

description of the MVME162.

MVME162 Functional Description

The MVME162 is a high-functionality VMEbus single board computer

designed around the MC68040/MC68LC040 chip. It has 1MB, 4MB, or 8MB of

DRAM, 512KB of SRAM, 1MB Flash memory, four MVIP IndustryPack

interfaces, and two serial ports (one EIA-232-D DCE; one EIA-232-D or EIA530 DCE/DTE). Options include an SCSI mass storage interface, a LAN

Ethernet transceiver interface, and a non-VMEbus version.


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