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UFC911B106 3BHE037864R0106控制處理器

作者:xqt 發(fā)布時(shí)間:2022-07-05 17:01:29 次瀏覽

UFC911B106 3BHE037864R0106控制處理器,ABB中文說(shuō)明VMEbus系統控制器VMEchip提供的眾多功能之一是VMEbus系統控制器功能。系統控制器包括以下內容:? VMEbus全局超時(shí)計時(shí)器? 系統時(shí)鐘(SYSCLK*)驅動(dòng)程序? 仲裁人? 中斷確認(IACK*)菊花鏈驅動(dòng)程序。此處還描述了系統重置實(shí)用程序,因為它已啟用當MVME147為系統控制器時(shí)。系統控制器功能由標題

UFC911B106 3BHE037864R0106控制處理器,ABB中文說(shuō)明

VMEbus系統控制器VMEchip提供的眾多功能之一是VMEbus系統控制器功能。系統控制器包括以下內容:? VMEbus全局超時(shí)計時(shí)器? 系統時(shí)鐘(SYSCLK*)驅動(dòng)程序? 仲裁人? 中斷確認(IACK*)菊花鏈驅動(dòng)程序。此處還描述了系統重置實(shí)用程序,因為它已啟用當MVME147為系統控制器時(shí)。系統控制器功能由標題J3啟用/禁用。

UFC911B106 3BHE037864R0106 -2.jpg

UFC911B106 3BHE037864R0106 -1.jpg

UFC911B106 3BHE037864R0106控制處理器當MVME147系統控制器,系統控制器(SCON)LED亮起。VMEbus超時(shí)當數據選通(DS0*或DS1*)處于活動(dòng)狀態(tài),當兩者都處于非活動(dòng)狀態(tài)時(shí),將被禁用。如果在數據選通停止前計時(shí)器超時(shí),總線(xiàn)錯誤(BERR*)信號被激活。超時(shí)時(shí)間由計時(shí)器間隔寄存器,可以是102μs、205μs、410μs或無(wú)限。系統時(shí)鐘實(shí)用程序

16 MHz系統時(shí)鐘被驅動(dòng)到VMEbus SYSCLK上*VMEchip系統時(shí)鐘驅動(dòng)器的信號線(xiàn)。

VMEchip實(shí)現了兩種不同的仲裁模式。他們優(yōu)先順序和循環(huán)。該模式可由軟件選擇。在優(yōu)先模式下,仲裁器優(yōu)先處理總線(xiàn)請求向最高優(yōu)先級的請求者發(fā)出信號并做出響應。仲裁器還通過(guò)激活當來(lái)自更高優(yōu)先級的請求時(shí),總線(xiàn)清除(BCLR*)信號主節點(diǎn)已在循環(huán)模式下接收,仲裁人在循環(huán)模式下分配總線(xiàn)優(yōu)先權基礎。循環(huán)賽中不使用BCLR*信號模式仲裁器還包含超時(shí)功能。它激活總線(xiàn)繁忙(BBSY*),如果請求者未在超時(shí)期。超時(shí)時(shí)間段可由軟件選擇,并且可以設置為410μs或無(wú)窮大。IACK*菊花鏈驅動(dòng)器IACK*菊花鏈驅動(dòng)器激活中斷確認

每當中斷處理程序確認中斷請求。

VMEbus System Controller

One of the many functions provided by the VMEchip is the

VMEbus system controller function. The system controller includes

the following:

? VMEbus global time-out timer

? System Clock (SYSCLK*) driver

? Arbiter

? Interrupt Acknowledge (IACK*) daisy-chain driver.

The system reset utility is also described here because it is enabled

when the MVME147 is system controller. The system controller

function is enabled/disabled by header J3. When the MVME147 is

system controller, the System Controller (SCON) LED is turned on.

VMEbus Time-Out

The VMEbus timer is started when either Data Strobe (DS0* or

DS1*) goes active and is disabled when they both go inactive. If the

timer times out before the data strobes go inactive, the Bus Error

(BERR*) signal is activated. The time-out period is controlled by the

timer interval register and may be 102 μs, 205 μs, 410 μs, or infinite.

System Clock Utility

The 16 MHz system clock is driven onto the VMEbus SYSCLK*

signal line by the VMEchip system clock driver.

Arbiter

The VMEchip implements two different arbitration modes. They

are prioritized and round-robin. The mode is software selectable.

In the prioritized mode, the arbiter prioritizes the bus request

signals and responds with grant to the highest priority requester.

The arbiter also informs the current bus master by activating the

Bus Clear (BCLR*) signal when a request from a higher priority

master has been receivedIn the round-robin mode, the arbiter assigns the bus on a rotating

priority basis. The BCLR* signal is not used in the round-robin

mode.

The arbiter also contains a time-out feature. It activates Bus Busy

(BBSY*) on its own if BBSY* is not activated by the requester within

the time-out period. The time-out period is software selectable and

may be set to 410 μs or infinite.

IACK* Daisy-Chain Driver

The IACK* daisy-chain driver activates the interrupt acknowledge

daisy-chain whenever an interrupt handler acknowledges an

interrupt request. 


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